A simple, verified validator for software pipelining
نویسندگان
چکیده
منابع مشابه
A Simple, Verified Validator for Software Pipelining (verification pearl)
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class performance characteristics, but at the cost of significant obfuscation of the code, making this optimization difficult to test and debug. In this paper, we present a translation validation algorithm that uses symbolic ...
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Recent advances in theorem proving technology have made it possible to write a completely bug-free compiler such as CompCert. However, this technology have not been fully applied to mainstream compilers such as GCC and LLVM due to the huge amount of work required. Nevertheless, we believe that the verified validation technique will reduce verification efforts significantly and thus make it feas...
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Current trends in many-core architectures show a switch from a small number of architecturally sophisticated cores (e.g. Intel Core2, IBM PowerPC) to many simple cores (e.g SiCortex and Tilera multiprocessor). These simple cores lack many of the advanced features of the complex cores (e.g. out-of-order execution, rotating register files, predication, speculation, etc.), which puts extra burden ...
متن کاملSoftware Pipelining for Nested Loops
In this paper, we present a novel framework of software pipelining for nested loops. Under this framework, a periodic scheduling function, called r-periodic schedule, is associated with each operation of the loop body in the entire iteration space. We present a simple problem formulation as well as e cient solutions which gives provable asymptotically time-optimal schedule for nested loops unde...
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High performance processors based on pipeline processing play an important role in scientific computation. We have proposed a hybrid pipeline architecture named Jetpipeline in our former work. The concept of Jetpipeline comes from the integration of superscalar, VLIW and vector architectures. Jetpipeline has multiple instruction pipelines, which execute multiple instructions like superscalar ar...
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ژورنال
عنوان ژورنال: ACM SIGPLAN Notices
سال: 2010
ISSN: 0362-1340,1558-1160
DOI: 10.1145/1707801.1706311